TSMC plans to expand CoWoS and SoIC production capacity to meet future demand

TSMC plans to expand its chip-on-wafer-on-substrate (CoWoS) capacity at a compound annual growth rate (CAGR) of more than 60% by the end of 2026 to meet future demand for AI and HPC processors. At the same time, the company will also expand the capacity of its integrated chip system (SoIC) 3D stacking technology at a CAGR of 100%.