Samsung and Synopsys collaborate to optimize 2nm process

Samsung Electronics announced a collaboration with Synopsys to jointly optimize its 2nm process technology. Synopsys' AI-driven design technology and collaborative optimization (DTCO) solutions will help Samsung improve the area, performance, and energy efficiency of its 2nm process. Samsung is expected to start mass production of 2nm chips next year. This generation of process uses a multi-bridge-channel field-effect transistor (MBCFET) architecture and introduces a unique epitaxial and integration process. Compared with the existing FinFET process, the new process improves transistor performance by 11% to 46%, reduces variability by 26%, and reduces leakage by about 50%.