Dear Secretary, Tesla recently launched the Dojo chip. It is understood that TSMC's excellent packaging technology - wafer integrated fan-out system (InFO_SoW) played an extremely critical role in it. So, I would like to ask whether your company currently has the technology to replace TSMC in this regard. If you do not currently have the technology to package Dojo, then what stage is your company's technology currently at? Thank you.

Changdian Technology: Hello, the company recently announced the official launch of XDFOI? A full range of ultra-high density fan-out packaging solutions that can effectively improve the IO density and computing power density within the chip. Heterogeneous integration is seen as a new opportunity for the development of advanced packaging and testing technology. This packaging solution is a new type of silicon-free wafer-level ultra-high density packaging technology. Compared with 2.5D silicon-through-via (TSV) packaging technology, it has higher performance, higher reliability and lower cost. This solution can achieve multi-layer wiring layers while the line width or line spacing can reach 2um. In addition, it uses ultra-narrow pitch bump interconnection technology, with a large package size, which can integrate multiple chips, high-bandwidth memory and passive devices. At present, ultra-high density wiring has been completed, and the customer sample process is about to start, and mass production is expected in the second half of next year. The key application areas are: high-performance computing applications such as FPGA, CPU/GPU, AI, 5G, autonomous driving, smart medical care, etc. Thank you!